For this datasheet, the PHY has been configured to support PCIe2.0/USB3.x specifically, but the PHY itself can be configured to support a wide range of HS SERDES protocols through changes to the PCS ...
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol and its signalling needs. It has features like ...
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