Developers can now access and optimize performance across RISC-V-based multicore systems, including analyzing the impact of shared resources and data coherency on worst-case execution time (WCET).

With these tools, OEMs can automate WCET analysis and make it part of a continuous development cycle. This WCET inclusion streamlines design, increases reliability and accelerates time-to-market and ...

LDRA today announced that the LDRA tool suite now supports the hardware-based, multicore mitigation capabilities of RISC-V processors such as Microchip, Synopsys and ANDES Technology. Developers can ...

This WCET inclusion streamlines design, increases reliability and accelerates time-to-market and guarantees deterministic execution in software-intensive applications that require a high level of ...