Design-Reuse4y
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 40LL
The PCIe2.0 PHY IP transceiver is optimized for low power consumption and small die area while retaining great result and data throughput. The PCIe2.0 PHY IP includes an on-chip physical transceiver ...
Design-Reuse4y
PCIe 2.0 Serdes PHY IP, Silicon Proven in SMIC 55LL/SP/EF
The PCIe2.0 PHY IP transceiver is optimized for low power consumption and small die area while retaining great result and data throughput. The PCIe2.0 PHY IP includes an on-chip physical transceiver ...