KA13UGPEP20ST001 provides a complete PHY layer solution for PCIe1.1/PCIe2.0 (2.5/5.0Gbps) for single lane application. It has a serial interface and PIPE3 compliant digital interface. KA13UGPEP20ST001 ...
For this datasheet, the PHY has been configured to support PCIe2.0/USB3.x specifically, but the PHY itself can be configured to support a wide range of HS SERDES protocols through changes to the PCS ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results